Deposition of low-stress carbon-containing layers

ABSTRACT

Examples of the present technology include semiconductor processing methods that provide a substrate in a substrate processing region of a substrate processing chamber, where the substrate is maintained at a temperature less than or about 50° C. A plasma may be generated from the hydrocarbon-containing precursor, and a carbon-containing material may be deposited from the plasma on the substrate. The carbon-containing material may include diamond-like-carbon, and may have greater than or about 60% of the carbon atoms with sp3 hybridized bonds.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a continuation of U.S. application Ser. No.16/987,666, filed Aug. 7, 2020, which is hereby incorporated byreference in its entirety for all purposes.

TECHNICAL FIELD

The present technology relates to methods and systems for semiconductorprocessing. More specifically, the present technology relates to systemsand methods for producing low-stress, carbon-containing layers orsemiconductor substrates.

BACKGROUND

Integrated circuits are made possible by processes which produceintricately patterned material layers on substrate surfaces. Producingpatterned material on a substrate requires controlled methods forforming and removing material. As device sizes continue to reduce, filmcharacteristics may lead to larger impacts on device performance.Materials used to form layers of materials may affect operationalcharacteristics of the devices produced. As material thicknessescontinue to reduce, as-deposited characteristics of the films may have agreater impact on device performance.

Thus, there is a need for improved systems and methods that can be usedto produce high quality devices and structures. These and other needsare addressed by the present technology.

SUMMARY

Embodiments of the present technology include semiconductor processingmethods that may include providing a substrate in a substrate processingregion of a substrate processing chamber, where the substrate ismaintained at a temperature less than or about 50° C. The methods mayfurther include flowing a hydrocarbon-containing precursor into thesubstrate processing region of the substrate processing chamber. Aplasma may be generated from the inert precursor and thehydrocarbon-containing precursor, and a carbon-containing material maybe deposited from the plasma on the substrate.

In exemplary embodiments, the hydrocarbon-containing precursor may beflowed at a flow rate of less than or about 50 standard cubiccentimeters per minute (sccm). Exemplary hydrocarbon-containingprecursors may include acetylene, among other hydrocarbons. The methodsmay include flowing an inert precursor into the substrate processingregion of the substrate processing chamber. the inert precursor may beflowed at a flow rate of more than about 1000 sccm, and exemplary inertprecursors may include helium and argon. The hydrocarbon-containingprecursor and inert precursor may come together in the substrateprocessing region of the substrate processing chamber to form a plasmacharacterized by a pressure of less than or about 100 mTorr. Plasmaeffluents from the plasma may be accelerated towards the substrate bydelivering a bias power to the substrate from a power source. The biaspower may be greater than 2000 Watts. The as-deposited carbon-containingmaterial on the substrate surface may be characterized by a stress lessthan or about −500 MPa.

Additional embodiments of the semiconductor processing methods mayinclude providing a substrate in a substrate processing region of asubstrate processing chamber, where the substrate is maintained at atemperature less than or about 50° C. A bias power may be delivered tothe substrate from a power source, where the bias power is greater than3000 Watts. The methods may further include generating a plasma from adeposition precursor comprising a hydrocarbon-containing precursor inthe substrate processing region of the substrate processing chamber, anddepositing a carbon-containing material from the plasma on thesubstrate.

In exemplary embodiments, the bias power delivered to the substrate fromthe power source may be greater than or about 4000 Watts, and may becharacterized by an operating frequency of less than or about 13.56 MHz.The deposition precursor may further include an inert precursor combinedwith the hydrocarbon-containing precursor. A flow rate of the inertprecursor may be greater than a flow rate for the hydrocarbon-containingprecursor, and a flow rate ratio of the inert precursor to thehydrocarbon-containing precursor may be greater than or about 10:1.

Still additional embodiments of the semiconductor processing methods mayinclude generating a plasma from a hydrocarbon-containing precursor inthe substrate processing region of the substrate processing chamber, anddepositing a carbon-containing material from the plasma on a substratein the substrate processing region of the substrate processing chamber.The carbon-containing material may be characterized an as-depositedstress that is less than or about −500 MPa.

In exemplary embodiments, the substrate may be characterized by atemperature of less than or about 50° C. during the deposition of thecarbon-containing material. The plasma may also be generated from aninert precursor that may include at least one of helium or argon. A flowrate ratio of the inert precursor to the hydrocarbon-containingprecursor may be greater than or about 10:1. The as-depositedcarbon-containing material may include greater than or about 60% of thecarbon atoms having bonds with sp³ hybridization, and less than or about25 mol % hydrogen. In exemplary embodiments, the as-depositedcarbon-containing material may be diamond-like carbon.

Such technology may provide numerous benefits over conventional systemsand techniques. For example, embodiments of the present technologyproduce as-deposited carbon hardmasks with low stress that do notsignificantly bend or distort adjacent substrate features. Additionally,embodiments include low-stress, diamond-like carbon layers that have ahigh-modulus and high uniformity. These and other embodiments, alongwith many of their advantages and features, are described in more detailin conjunction with the below description and attached figures.

BRIEF DESCRIPTION OF THE DRAWINGS

A further understanding of the nature and advantages of the disclosedtechnology may be realized by reference to the remaining portions of thespecification and the drawings.

FIG. 1 shows a top view of an exemplary processing system according tosome embodiments of the present technology.

FIG. 2A shows a schematic cross-sectional view of an exemplarysemiconductor processing chamber according to some embodiments of thepresent technology.

FIG. 2B shows a schematic cross-sectional view of an additionalexemplary semiconductor processing chamber according to some embodimentsof the present technology.

FIG. 3 shows a schematic cross-sectional view of an exemplary substratesupport and electrostatic chuck according to some embodiments of thepresent technology.

FIG. 4 shows operations in a semiconductor processing method accordingto some embodiments of the present technology.

Several of the figures are included as schematics. It is to beunderstood that the figures are for illustrative purposes, and are notto be considered of scale unless specifically stated to be of scale.Additionally, as schematics, the figures are provided to aidcomprehension and may not include all aspects or information compared torealistic representations, and may include exaggerated material forillustrative purposes.

In the appended figures, similar components and/or features may have thesame reference label. Further, various components of the same type maybe distinguished by following the reference label by a letter thatdistinguishes among the similar components. If only the first referencelabel is used in the specification, the description is applicable to anyone of the similar components having the same first reference labelirrespective of the letter.

DETAILED DESCRIPTION

The present technology includes systems and process methods fordepositing low-stress layers of carbon-containing materials on asemiconductor substrate. Embodiments of these systems and methodsaddress the problem of forming these materials in and around substratefeatures of increasing depths and narrower widths. Conventional systemsand methods of depositing carbon-containing materials, such ascarbon-containing hardmasks, produce layers having significant amountsof stress (e.g., stress levels of less than or about −1000 MPa, where amore negative the stress value represents a greater exertion ofcompressive force by the material). As these high-stress materials aredeposited over surface features that may already be characterized byhigh stress, further problems may occur. For example, in one exemplaryscenario, carbon hardmask films may be formed over 3D NAND placeholderstructures to facilitate memory hole formation, stair step structure forcontact formation, or other processing. 3D NAND stack pairs may becharacterized by high stress from the many cell material layer pairs,and the incoming substrate may already show a compressive bowing. As 3DNAND stacks increase in pairs, in order to etch through the greaterstacks, thicker hardmasks may be used. However, as the mask thicknessincreases, the increased stress may cause the structure to bend, themask to fracture, and the device to ultimately fail. Consequently, manyconventional mask materials cannot accommodate processing for advancedmemory structures.

Alleviating the stress by replacing or eliminating carbon-containinglayers that act as hardmasks during the patterning and etching of devicefeatures in and on a substrate is problematic. Carbon-containinghardmasks are typically deposited between underlying substrate materialsand overlying energy-sensitive resist layer (e.g., a photoresist layer).The hardmask provides selective resistance to the etchants used to formfeatures in the underlying substrate materials according to the patterncreated in the energy-sensitive resist layer. If the hardmask layer wereeliminated, the etchants would attack portions of the substrate featureintended to stay intact, resulting in the erosion and possibledestruction of the features.

The present technology addresses these problems, among others, byproviding systems and process methods to deposit a low-stresscarbon-containing material on a substrate that can act as acarbon-containing hardmask, among other functions. Embodiments of thesystems and methods deposit low-stress, carbon-containing materials bymaintaining one or more process parameters that operate in conjunctionto reduce hydrogen incorporation, improve carbon bonding structures, andlower film stress. Some of these parameters to be described belowinclude the substrate temperature, the flow rate ratio of inertprecursors to hydrocarbon-containing precursors that help form adeposition plasma, and the bias power used to generate the depositionplasma, among other process parameters.

The present technology may improve the deposition of carbon atoms withsp³ hybridization and a material with lower amounts of hydrogen. Theincreased amount of carbon atoms with sp³ hybridization increases thenetwork of covalently crosslinked carbon-carbon single bonds, which maygive the as-deposited material the characteristics of adiamond-like-carbon (DLC) layer. In contrast, materials favoring carbonswith sp² hybridization may give an as-deposited layer with moregraphite-like-carbon characteristics. Diamond-like-carbon has a moreisotropic distribution of carbon-carbon bond lengths and strengthscompared to graphite-like-carbon, where in-plane bonds are shorter andstronger than the orthogonal bonds outside the plane. As a result, thediamond-like-carbon layers are deposited with lower stress thangraphite-like-carbon layers. Thus, the present technology, among otherfeatures, permits the deposition of low-stress carbon-containing layersthat can function as hardmasks in deep and narrow substrate gaps withoutcausing the bending, fracturing and failure of the adjacent substratefeatures (e.g., film stacks).

Although the remaining disclosure will routinely identify specificdeposition processes utilizing the disclosed technology, it will bereadily understood that the systems and methods are equally applicableto other deposition and treatment processes as may occur in thedescribed chambers or any other chamber. Accordingly, the presenttechnology may be implemented in a variety of chemical-vapor-depositionchambers, and should not be considered to be so limited as for use withthese specific deposition processes or chambers alone. The disclosurewill discuss one possible system and chamber that may be used inperforming process methods according to some embodiments of the presenttechnology before additional variations and adjustments to this systemaccording to embodiments of the present technology are described.

FIG. 1 shows a top plan view of one embodiment of a semiconductorprocessing system 100 of deposition, etching, baking, and curingchambers according to embodiments. In the figure, a pair of frontopening unified pods 102 supply substrates of a variety of sizes thatare received by robotic arms 104 and placed into a low pressure holdingarea 106 before being placed into one of the substrate processingchambers 108 a-f, positioned in tandem sections 109 a-c. A secondrobotic arm 110 may be used to transport the substrate wafers from theholding area 106 to the substrate processing chambers 108 a-f and back.Each substrate processing chamber 108 a-f, can be outfitted to perform anumber of substrate processing operations including formation of stacksof semiconductor materials described herein in addition toplasma-enhanced chemical vapor deposition, atomic layer deposition,physical vapor deposition, etch, pre-clean, degas, orientation, andother substrate processes including, annealing, ashing, etc.

The substrate processing chambers 108 a-f may include one or more systemcomponents for depositing, annealing, curing and/or etching a dielectricor other film on the substrate. In one configuration, two pairs of theprocessing chambers, e.g., 108 c-d and 108 e-f, may be used to depositdielectric material on the substrate, and the third pair of processingchambers, e.g., 108 a-b, may be used to etch the deposited dielectric.In another configuration, all three pairs of chambers, e.g., 108 a-f,may be configured to deposit stacks of alternating dielectric films onthe substrate. Any one or more of the processes described may be carriedout in chambers separated from the fabrication system shown in differentembodiments. It will be appreciated that additional configurations ofdeposition, etching, annealing, and curing chambers for dielectric filmsare contemplated by system 100.

FIGS. 2A and 2B show a schematic cross-sectional views of an exemplarysemiconductor processing systems 232 and 280 according to someembodiments of the present technology. The figures may illustrate anoverview of systems incorporating one or more aspects of the presenttechnology, and/or which may be specifically configured to perform oneor more operations according to embodiments of the present technology.Additional details of the systems 232 and 280, and methods performed,may be described further below. Systems 232 and 280 may be utilized toform carbon-containing layers, such as carbon hardmasks, according tosome embodiments of the present technology, although it is to beunderstood that the methods may similarly be performed in any systemwithin which layer formation may occur.

Referring now to FIG. 2A, the semiconductor processing system 232includes semiconductor processing chamber 200, which may include a topwall 224, a sidewall 201 and a bottom wall 222 that define a substrateprocessing region 226. A gas panel 230 and a controller 210 may becoupled to the processing chamber 200. A substrate support assembly 246may be provided in the substrate processing region 226 of the processchamber 200.

The substrate support assembly 246 may include an electrostatic chuck250 supported by a stem 260. The electrostatic chuck 250 may befabricated from aluminum, ceramic, and other suitable materials such asstainless steel. The electrostatic chuck 250 may be moved in a verticaldirection inside the process chamber 200 using a displacement mechanism(not shown). A temperature sensor 272, such as a thermocouple, may beembedded in the electrostatic chuck 250 to monitor the temperature ofthe electrostatic chuck 250. The measured temperature may be used by thecontroller 210 to control the power supplied to the heater element 270to maintain the substrate at a desired temperature.

A vacuum pump 202 may be coupled to a port formed in the bottom of theprocess chamber 200. The vacuum pump 202 may be used to maintain adesired gas pressure in the process chamber 200. The vacuum pump 202also evacuates post-processing gases and by-products of the process fromthe process chamber 200.

A gas distribution assembly 220 having a plurality of apertures 228 maybe disposed on the top of the process chamber 200 above theelectrostatic chuck 250. The apertures 228 of the gas distributionassembly 220 are utilized to introduce process gases into the processchamber 200. The apertures 228 may have different sizes, number,distributions, shape, design, and diameters to facilitate the flow ofthe various process gases for different process requirements. The gasdistribution assembly 220 is connected to the gas panel 230 that allowsvarious gases to flow to the processing volume 226 during processing. Aplasma is formed from the process gas mixture exiting the gasdistribution assembly 220 to enhance thermal decomposition of theprocess gases resulting in the deposition of material on a top surface291 of a substrate 290 positioned on the electrostatic chuck 250.

The gas distribution assembly 220 and the electrostatic chuck 250 mayform a pair of spaced apart electrodes in the processing volume 226. Oneor more RF power sources 240 provides a bias potential through amatching network 238, which is optional, to the gas distributionassembly 220 to facilitate generation of plasma. between the gasdistribution assembly 220 and the electrostatic chuck 250.Alternatively, the RF power source 240 and the matching network 238 maybe coupled to the gas distribution assembly 220, the electrostatic chuck250, or coupled to both the gas distribution assembly 220 and theelectrostatic chuck 250, or coupled to an antenna (not shown) disposedexterior to the process chamber 200. In some embodiments, the RF powersource 240 may produce power at a frequency of greater than or about 100KHz, greater than or about 500 KHz, greater than or about 1 MHz, greaterthan or about 10 MHz, greater than or about 20 MHz, greater than orabout 50 MHz, greater than or about 100 MHz, among other frequencyranges. Specific examples of frequencies of the power produced by RFpower source 240 include 350 KHz, 2 MHz, 13.56 MHz, 27 MHz, 40 MHz, 60MHz, 100 MHz, and 162 MHz, among other frequencies.

The controller 210 includes a central processing unit (CPU) 212, amemory 216, and a support circuit 214 utilized to control the processsequence and regulate the gas flows from the gas panel 230. The CPU 212may be of any form of a general-purpose computer processor that may beused in an industrial setting. The software routines can he stored inthe memory 216, such as random access memory, read only memory, floppy,or hard disk drive, or other form of digital storage. The supportcircuit 214 is coupled to the CPU 212 and may include cache, clockcircuits, input/output systems, power supplies, and the like.Bi-directional communications between the controller 210 and the variouscomponents of the substrate processing system 232 are handled throughnumerous signal cables collectively referred to as signal buses 218,some of which are illustrated in FIG. 2A.

FIG. 2B depicts a schematic cross-sectional view of another substrateprocessing system 280 that can be used for the practice of embodimentsdescribed herein. The substrate processing system 280 is similar to thesubstrate processing system 232 of FIG. 2A, except that the substrateprocessing system 280 is configured to radially flow processing gasesfrom gas panel 230 across the top surface 291 of the substrate 290 viathe sidewall 201. In addition, the gas distribution assembly 220depicted in FIG., 2A is replaced with an electrode 282. The electrode282 may be configured for secondary electron generation. In oneembodiment, the electrode 282 is a silicon-containing electrode.

FIG. 3 depicts a schematic cross-sectional view of the substrate supportassembly 346 that may be used in embodiments of the systems. Thesubstrate support assembly 346 may include an electrostatic chuck 350,which may include a heater element 370 suitable for controlling thetemperature of the substrate 390 supported on an upper surface 392 ofthe electrostatic chuck 350. The heater element 370 may be embedded inthe electrostatic chuck 350. The electrostatic chuck 350 may beresistively heated by applying an electric current from a heater powersource 306 to the heater element 370. The heater power source 306 may becoupled through an RF filter 316 to protect the heater power source 306from RF energy. The electric current supplied from the heater powersource 306 is regulated by the controller 310 to control the heatgenerated by the heater element 370, thus maintaining the substrate 390and the electrostatic chuck 350 at a substantially constant temperatureduring film deposition. The supplied electric current may be adjusted toselectively control the temperature of the electrostatic chuck 350between about 20° C. to about 350° C. during deposition of acarbon-containing film on the substrate. A cooling unit (not shown) mayalso be thermally coupled to the substrate support assembly 346 toselectively control the temperature of the substrate 390 to atemperature between about −50° C. to about 20° C.

In some embodiments, the electrostatic chuck 350 includes a chuckingelectrode 410, which may be a mesh of a conductive material. Thechucking electrode 410 may be embedded in the electrostatic chuck 350.The chucking electrode 410 is coupled to a chucking power source 412that, when energized, electrostatically clamps the substrate 390 to theupper surface 392 of the electrostatic chuck 350.

The chucking electrode 310 may be configured as a monopolar or bipolarelectrode, or have another suitable arrangement. The chucking electrode410 may be coupled through an RF filter 414 to the chucking power source412, which provides direct current (DC) power to electrostaticallysecure the substrate 390 to the upper surface 392 of the electrostaticchuck 350. The RF filter 414 prevents RF power utilized to form plasmawithin the process chamber from damaging electrical equipment. Theelectrostatic chuck 350 may be fabricated from a ceramic material, suchas AlN or Al₂O₃.

A power application system 420 is coupled to the substrate supportassembly 346. The power application system 420 may include the heaterpower source 306, the chucking power source 412, a first radio frequency(RF) power source 430, and a second RF power source 440. Embodiments ofthe power application system 420 may additionally include the controller310, and a sensor device 450 that is in communication with thecontroller 310 and both of the first RF power source 430 and the secondRF power source 440. The controller 310 may also be utilized to controlthe plasma from the processing gas by application of RF power from thefirst RF power source 430 and the second RF power source 440 in order todeposit a layer of material on the substrate 390.

As described above, the electrostatic chuck 350 includes the chuckingelectrode 410 that may function in one aspect to chuck the substrate 390while also functioning as a first RF electrode. The electrostatic chuck350 may also include a second RE electrode 460, and together with thechucking electrode 410, may apply RF power to tune the plasma. The firstRF power source 430 may be coupled to the second RF electrode 460 whilethe second RF power source 440 may be coupled to the chucking electrode410. A first matching network and a second matching network may beprovided for the first RF power source 430 and the second RF powersource 440, respectively. The second RF electrode 460 may be a solidmetal plate of a conductive material or a mesh of conductive material.

The first RF power source 430 and the second RF power source 440 mayproduce power at the same frequency or a different frequency. In someembodiments, one or both of the first RF power source 430 and the secondRF power source 440 may independently produce power at a frequency ofgreater than or about 100 KHz, greater than or about 500 KHz, greaterthan or about 1 MHz, greater than or about 10 MHz, greater than or about20 MHz, greater than or about 50 MHz, greater than or about 100 MHz,among other frequency ranges. Specific examples of frequencies of thepower independently produced by RF power sources 430, 440 include 350KHz, 2 MHz, 13.56 MHz, 27 MHz, 40 MHz, 60 MHz, 100 MHz, and 162 MHz,among other frequencies. RF power from one or both of the first RF powersource 430 and second RF power source 440 may be varied in order to tunethe plasma.

FIG. 4 shows exemplary operations in a processing method 400 accordingto some embodiments of the present technology. The method may beperformed in a variety of processing chambers, including processingsystems 232 and 280 described above. Method 300 may include one or moreoperations prior to the initiation of the stated method operations,including front end processing, deposition, etching, polishing,cleaning, or any other operations that may be performed prior to thedescribed operations. The method may include a number of optionaloperations as denoted in the figure, which may or may not specificallybe associated with the method according to the present technology. Forexample, many of the operations are described in order to provide abroader scope of the semiconductor process, but are not critical to thetechnology, or may be performed by alternative methodology as will bediscussed further below.

Method 400 may involve optional operations to develop the semiconductorstructure to a particular fabrication operation. Although in someembodiments method 400 may be performed on a base structure, in someembodiments the method may be performed subsequent other materialformation or removal. For example, any number of deposition, masking, orremoval operations may be performed to produce any transistor, memory,or other structural aspects on a substrate. In some embodiments one ormore structures formed on a substrate may be characterized by a thermalbudget of less than or about 500° C., less than or about 450° C., lessthan or about 400° C., or less. Accordingly, method 400 and anysubsequent operations may be performed at temperatures that are at orbelow the structural thermal budget. The substrate may be disposed on asubstrate support, which may be positioned within a processing region ofa semiconductor processing chamber. The operations to produce theunderlying structures may be performed in the same chamber in whichaspects of method 400 may be performed, and one or more operations mayalso be performed in one or more chambers on a similar platform as achamber in which operations of method 400 may be performed, or on otherplatforms.

In some embodiments, method 400 may include providing a substrate in asubstrate processing region of a substrate processing chamber 405. Thesubstrate may have a temperature less than or about 50° C. in thesubstrate processing chamber. In some embodiments, the substratetemperature may be adjusted and maintained down to about 20° C. byheater elements in a substrate support assembly in the substrateprocessing chamber. In additional embodiments, the substrate temperaturemay be adjusted and maintained less than or about 20° C. by a coolingunit that delivers a cooling fluid to the substrate support assembly.Additional substrate temperature ranges include less than or about 40°C., less than or about 30° C., less than or about 20° C., less than orabout 10° C., less than or about 0° C., less than or about −10° C., lessthan or about −20° C., less than or about −30° C., or less.

Exemplary substrates materials may include crystalline silicon (e.g.,Si<100> or Si<111>), silicon oxide, strained silicon, silicon germanium,doped or undoped polysilicon, doped or undoped silicon substrates andpatterned or non-patterned substrates silicon on insulator (SOI),carbon-doped silicon oxides, silicon nitride, doped silicon, germanium,gallium arsenide, glass, and sapphire, among other substrate materials.The substrate may further include substrate features such as gaps, vias,trenches, steps, among other types of features. The substrate featuresmay be formed directly in a base substrate. Alternatively, or inaddition, the substrate features may be formed in layers of insulating,conductive, and/or semiconductive materials deposited on the basesubstrate that constitute part of the substrate in the substrateprocessing region during method 400. Exemplary substrates may takevarious shapes such as circular, rectangular, or square, and may havedimensions of for example, 200 mm, 300 mm, or 450 mm, in diameter, side,or diagonal.

Method 400 may further include flowing precursors into the substrateprocessing region of the substrate processing chamber containing thesubstrate 410. The precursors may include an inert precursor and ahydrocarbon-containing precursor. The flow rate ratio of the inertprecursor to the hydrocarbon-containing precursor may be greater than orabout 10:1, and may be greater than or about 20:1, greater than or about30:1, greater than or about 40:1, greater than or about 50:1, or more.Exemplary flow rate ranges for the inert precursor may include more thanor about 1000 sccm. Additional exemplary flow rate ranges for the inertprecursor may include more than or about 1500 sccm, more than or about2000 sccm, more than or about 2500 sccm, more than or about 3000 sccm,more than or about 3500 sccm, more than or about 4000 sccm, more than orabout 4500 sccm, more than or about 5000 sccm, or more. Exemplary flowrates ranges for the hydrocarbon-containing precursor may include lessthan or about 50 sccm. Additional exemplary flow rate ranges may includeless than or about 100 sccm, less than or about 75 sccm, less than orabout 40 sccm, less than or about 30 sccm, less than or about 20 sccm,less than or about 10 sccm, less than or about 5 sccm, or less.

The dilution of the hydrocarbon-containing precursor in an excess of theinert precursor in the substrate processing region has been found toform an as-deposited layer of carbon-containing material on thesubstrate with a reduced level of stress when combined with higherplasma power. For example, when highly diluted precursors are providedwith high plasma power, an increased plasma density may be produced thatincludes a greater amount of radical effluents that may facilitatemodifying the as-deposited layer without being incorporated into thelayer. By forming a bias plasma, such as generating plasma from biaspower instead of applying a bias to a capacitively-coupled plasma, andby utilizing high bias power, increased ion impact may be affordedduring deposition. When the precursors forming the plasma include higherdilution with inert gas as higher plasma powers are applied, theincreased bombardment of the depositing material with high-energy inertions may reduce the amount of stress in the as-deposited material byincreasing hydrogen removal and the number of carbons having sp³bonding.

In some embodiments, the precursors supplied to the substrate processingregion may generate and maintain a processing pressure in the substrateprocessing chamber of less than or about 100 mTorr. Additional exemplaryprocessing pressure ranges include less than or about 1 Torr, less thanor about 500 mTorr, less than or about 50 mTorr, less than or about 10mTorr, less than or about 5 mTorr, less than or about 1 mTorr, less thanor about 0.1 mTorr, or less, among other pressure ranges. By loweringthe processing pressure in some embodiments, increased ion bombardmentmay occur by increasing the mean-free-path between atoms. This mayincrease the distance of travel between collisions, which may increasethe energy and frequency of bombardment in the depositing material. Thismay further facilitate the reduction of hydrogen and increased carbonsp³ bonding within the material, and reduce the level of stress in theas-deposited, carbon-containing layer.

Exemplary inert precursors may include at least one of helium, argon,and neon. Although any number of inert precursors may be utilized insome embodiments, by utilizing helium, reduced hydrogen and nitrogenincorporation within the layer may be maintained, while also reducing asputtering component from larger inert precursors such as argon.Exemplary hydrocarbon-containing precursors may include acetylene(C₂H₂). Additional exemplary hydrocarbon-containing precursors mayinclude hydrocarbon compounds having the general formula C_(x)H_(y),where x has a range of between 1 and 20 and y has a range of between 1and 20. Suitable hydrocarbon compounds include, for example, C₃H₆, CH₄,C₄H₈, 1,3-dimethyladamantane, bicyclo[2.2.1]hepta-2,5-diene(2,5-Norbornadiene), adamantine (C₁₀H₁₆), norbornene (C₇H₁₀), amongother hydrocarbon compounds. In some embodiments, a carbon-to-hydrogenratio may be maintained at less than or about 4:1, less than or about3:1, less than or about 2:1, less than or about 1:1, or less, which mayfurther facilitate limiting hydrogen incorporation during the depositionof the carbon-containing material.

Method 400 may further include generating a plasma from the precursorsin the substrate processing region of the substrate processing chamber415. The plasma may be generated by applying an RF bias power to theprecursors in the substrate processing region. The RF bias power may begreater than 2000 Watts, and may be characterized by a frequency of fromabout 350 KHz to about 162 MHz (e.g., 350 KHz, 2 MHz, 13.56 MHz, 27 MHz,40 MHz, 60 MHz, 100 MHz, or 162 MHz). As noted previously, someembodiments of the present technology may produce a bias plasma at ahigher plasma power to improve film characterisitics of the as-depositedmaterial. For example, in some embodiments the bias plasma may beproduced at a delivered power of greater than or about 2500 W, greaterthan or about 3000 W, greater than or about 3500 W, greater than orabout 4000 W, greater than or about 4500 W, or greater. By increasingthe plasma power, which may be performed in conjunction with increasedinert precursor delivery, an amount of bombardment from the inertprecursor may be produced, which may modify the deposited materials toimprove carbon bonding and reduce hydrogen incorporation. Referring toFIG. 3 above, in some embodiments the RE bias power may be delivered tothe precursors in the substrate processing region by the electrostaticchuck 350 that is supplied with RF power from the second RF power source440. In additional embodiments, the RF bias power may also be suppliedin whole or in part by the second RE electrode 460 in electroniccommunication with the first RF power source 430 that supplies a biasingvoltage to the second RE electrode 460. The first RF power source 430may produce power at a frequency of from about 350 KHz to about 100 MHz(e.g., 350 KHz, 2 MHz, 13.56 MHz, 27 MHz, 40 MHz, 60 MHz, or 100 MHz).

In some embodiments, operation 415 may further comprise applying asecond RF bias power to the electrostatic chuck to independently controlion density and ion energy to modulate film stress. The second RF biaspower may be greater than or about 10 Watts, and may have a frequencygreater than or about 350 KHz. Referring to FIG. 3, in some embodiments,the second RF bias power is provided to the substrate 391 via thechucking electrode 410. The chucking electrode 410 may be in electroniccommunication with second RF power source 440 that supplies a biasingvoltage to the chucking electrode 410. The second RF bias power may beprovided at a power greater than or about 10 Watts. In some embodiments,the RF bias power and the second RF bias power may both be delivered tothe precursors to generate a plasma during operation 415. In additionalembodiments, the RF bias power may be delivered to the substrate via thechucking electrode 410, and the second RF bias power may be deliveredvia the second RE Flectrode 460.

The generated plasma deposits a carbon-containing material on thesubstrate in the substrate processing chamber at operation 420. Theamount of material deposited may be a layer with an average thicknessgreater than or about 10 Å. Additional exemplary average thicknessranges may include greater than or about 50 Å, greater than or about 100Å, greater than or about 1000 Å, greater than or about 5000 Å, greaterthan or about 10,000 Å, greater than or about 20,000 Å, or more.

The carbon-containing material may be deposited with low stress. Lowstress materials are characterized by internal stress levels that arecloser to neutral stress (i.e., 0 MPa). In contrast, high stressmaterials are characterized by internal stress levels that aresignificantly greater than 0 MPa (i.e., high positive (tensile) stress)or significantly less than 0 MPa (i.e., high negative (compressive)stress). High positive stress, which may be characterized as tensilestress, may be caused by the expansion of the material that creates anoutward, pushing force on adjacent substrate features. High negativestress, which may be characterized as compressive stress, may be causedby the contraction of the material that creates an inward, pulling forceon adjacent substrate features. In other words, higher-stress materialsmay be characterized by a stress level with an absolute value that issignificantly greater than 0 MPa. Thus, when a material is characterizedby a stress level of “greater than −1000 MPa”, this refers to theabsolute value of the stress level, and includes levels such as −1500MPa, −2000 MPa, etc. Similarly, when a material is characterized by astress level of “less than −1000 MPa”, this refers stress levels thatare closer to neutral stress (i.e., 0 MPa), and includes levels such as−500 MPa, −100 MPa, etc., but does not extend to positive values greaterthan or about 1000 MPa.

Exemplary stress values of the as-deposited material may include lessthan or about −500 MPa or less, where a stress value that is morenegative means the material has more stress, and a stress value closerto 0 MPa has less stress. Additional exemplary stress value ranges mayinclude less than or about −400 MPa, less than or about −300 MPa, lessthan or about −200 MPa, less than or about −100 MPa, less than or about−50 MPa, and less than or about −10 MPa, or less. While not intending tobe bound by any particular theory about what causes the as-depositedmaterial to be characterized by such low stress levels, it is believedthat higher content of sp³ hybridized carbons in the material, and loweramounts of hydrogen in the material, contribute to the formation oflow-stress, carbon-containing layers. For example, in some embodiments,the percentage of sp³ hybridized carbon atoms may include greater thanor about 40%, greater than or about 50%, greater than or about 60%,greater than or about 70%, and greater than or about 80%, greater thanor about 90%, or more. Additionally, in some embodiments, the amount ofhydrogen incorporation within the deposited material may be maintainedat less than or about 30 mol. %, and may be maintained at less than orabout 25 mol. %, less than or about 20 mol. %, less than or about 15mol. %, less than or about 10 mol. %, or less. These characteristics mayfacilitate reduced compressive stress within materials producedaccording to embodiments of the present technology.

The high content of sp³ hybridized carbons in the material may make it adiamond-like-carbon material. Additional embodiments of the as-depositedcarbon-containing material include amorphous carbon material andsilicon-containing carbon, among other types of carbon-containingmaterials.

The Young's modulus of the deposited material may also be impacted byembodiments of the present processing methods. In some embodiments, theas-deposited material may be characterized by a modulus of greater thanor about 150 GPa, and may be characterized by a modulus of greater thanor about 160 GPa, greater than or about 170 GPa, greater than or about180 GPa, greater than or about 190 GPa, greater than or about 200 GPa,or more.

Method 400 may optionally include treating the as-depositedcarbon-containing material formed on the substrate 425. Embodiments oftreatment operations may include polishing, etching, patterning, andcuring the as-deposited layer of carbon-containing material, among othertypes of treatments. In some embodiments, the carbon-containing materialmay be exposed to hydrogen radicals during deposition and/oras-deposited on the substrate. In some embodiments, the hydrogenradicals may be generated in a remote-plasma-system (RPS) positionedoutside the processing chamber and substrate processing region. TheRPS-generated hydrogen radicals are then delivered to the substrateprocessing region of the substrate processing chamber, where they canmix and react with the plasma effluents and/or the deposited material.In some embodiments, the hydrogen radicals react with carbons having sp²hybridization and convert them into additional sp³ hybridized carbons.

The embodiment described in method 400 forms a low-stresscarbon-containing materials that may be useful as, for example, hardmasklayers in the fabrication of semiconductor devices. The low-stress inthe as-deposited layers allow them to be deposited without placingexcessive stress on adjacent (e.g., underlying) substrate structuresthat may cause those structures to further distort, or cause the masklayer to fracture due to increased stress. The carbon-containing layersmay also have excellent optical and etch-selectivity properties thatmake them well suited as hardmasks.

In the preceding description, for the purposes of explanation, numerousdetails have been set forth in order to provide an understanding ofvarious embodiments of the present technology. It will be apparent toone skilled in the art, however, that certain embodiments may bepracticed without some of these details, or with additional details.

Having disclosed several embodiments, it will be recognized by those ofskill in the art that various modifications, alternative constructions,and equivalents may be used without departing from the spirit of theembodiments. Additionally, a number of well-known processes and elementshave not been described in order to avoid unnecessarily obscuring thepresent technology. Accordingly, the above description should not betaken as limiting the scope of the technology.

Where a range of values is provided, it is understood that eachintervening value, to the smallest fraction of the unit of the lowerlimit, unless the context clearly dictates otherwise, between the upperand lower limits of that range is also specifically disclosed. Anynarrower range between any stated values or unstated intervening valuesin a stated range and any other stated or intervening value in thatstated range is encompassed. The upper and lower limits of those smallerranges may independently be included or excluded in the range, and eachrange where either, neither, or both limits are included in the smallerranges is also encompassed within the technology, subject to anyspecifically excluded limit in the stated range. Where the stated rangeincludes one or both of the limits, ranges excluding either or both ofthose included limits are also included.

As used herein and in the appended claims, the singular forms “a”, “an”,and “the” include plural references unless the context clearly dictatesotherwise. Thus, for example, reference to “a precursor” includes aplurality of such precursors, and reference to “the layer” includesreference to one or more layers and equivalents thereof known to thoseskilled in the art, and so forth.

Also, the words “comprise(s)”, “comprising”, “contain(s)”, “containing”,“include(s)”, and “including”, when used in this specification and inthe following claims, are intended to specify the presence of statedfeatures, integers, components, or operations, but they do not precludethe presence or addition of one or more other features, integers,components, operations, acts, or groups.

1. A semiconductor processing method comprising: providing a substratein a substrate processing region of a substrate processing chamber,wherein the substrate is maintained at a temperature less than or about50° C.; flowing a hydrocarbon-containing precursor into the substrateprocessing region of the substrate processing chamber; generating aplasma from the hydrocarbon-containing precursor; and depositing acarbon-containing material from the plasma on the substrate.
 2. Thesemiconductor processing method of claim 1, wherein thehydrocarbon-containing precursor is flowed at a flow rate of less thanor about 50 sccm.
 3. The semiconductor processing method of claim 1,further comprising: flowing an inert precursor into the substrateprocessing region of the substrate processing chamber, wherein the inertprecursor is flowed at a flow rate of more than or about 1000 sccm. 4.The semiconductor processing method of claim 1, wherein the substrateprocessing chamber is maintained at a pressure of less than or about 100mTorr.
 5. The semiconductor processing method of claim 1, wherein thecarbon-containing material is deposited at an average thickness greaterthan or about 10 Å.
 6. The semiconductor processing method of claim 1,wherein the hydrocarbon-containing precursor comprises acetylene.
 7. Thesemiconductor processing method of claim 1, further comprising: flowingan inert precursor into the substrate processing region of the substrateprocessing chamber, wherein the inert precursor comprises at least oneof helium or argon.
 8. The semiconductor processing method of claim 1,wherein the plasma is a bias plasma formed at a bias power greater than2000 Watts.
 9. The semiconductor processing method of claim 1, whereinthe carbon-containing material is characterized by an as-depositedstress that is less than or about −1500 MPa.
 10. A semiconductorprocessing method comprising: providing a substrate in a substrateprocessing region of a substrate processing chamber, wherein thesubstrate is maintained at a temperature less than or about 50° C.;generating a plasma from a deposition precursor comprising ahydrocarbon-containing precursor in the substrate processing region ofthe substrate processing chamber, wherein the plasma is a bias plasmagenerated at a bias power of greater than or about 3000 W, wherein thedeposition precursor further comprises an inert precursor; anddepositing a carbon-containing material from the plasma on thesubstrate.
 11. The semiconductor processing method of claim 10, whereinthe bias power is greater than or about 4000 Watts.
 12. Thesemiconductor processing method of claim 10, wherein the bias power isdelivered at an operating frequency less than or about 13.56 MHz. 13.The semiconductor processing method of claim 10, wherein thecarbon-containing material comprises less than or about 25 mol %hydrogen.
 14. The semiconductor processing method of claim 10, wherein aflow rate ratio of the inert precursor to the hydrocarbon-containingprecursor is greater than or about 10:1.
 15. A semiconductor processingmethod comprising: generating a plasma from a hydrocarbon-containingprecursor an inert precursor comprising at least one of helium or argonin a substrate processing region of a substrate processing chamber; anddepositing a carbon-containing material from the plasma on a substratein the substrate processing region of the substrate processing chamber,wherein the carbon-containing material is characterized by anas-deposited stress that is less than or about −500 MPa.
 16. Thesemiconductor processing method of claim 15, wherein the substrate ismaintained at a temperature less than or about 50° C.
 17. Thesemiconductor processing method of claim 15, wherein a flow rate ratioof the inert precursor to the hydrocarbon-containing precursor isgreater than or about 10:1.
 18. The semiconductor processing method ofclaim 15, wherein the carbon-containing material comprises greater thanor about 60% carbon atoms with sp³ hybridized bonds.
 19. Thesemiconductor processing method of claim 15, wherein thecarbon-containing material comprises less than or about 25 mol %hydrogen.
 20. The semiconductor processing method of claim 15, whereinthe carbon-containing material comprises a diamond-like carbon.